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 FRL430D, FRL430R, FRL430H
June 1998
2A, 500V, 2.50 Ohm, Rad Hard, N-Channel Power MOSFETs
Package
TO-205AF
Features
* 2A, 500V, RDS(on) = 2.50 * Second Generation Rad Hard MOSFET Results From New Design Concepts * Gamma Meets Pre-Rad Specifications to 100KRAD(Si) Defined End Point Specs at 300KRAD(Si) and 1000KRAD(Si) Performance Permits Limited Use to 3000KRAD(Si) Survives 3E9RAD(Si)/sec at 80% BVDSS Typically Survives 2E12 Typically If Current Limited to IDM 8.0nA Per-RAD(Si)/sec Typically Pre-RAD Specifications for 3E12 Neutrons/cm2 Usable to 3E13 Neutrons/cm2
* Gamma Dot * Photo Current * Neutron
Description
The Intersil Corporation has designed a series of SECOND GENERATION hardened power MOSFETs of both N and P channel enhancement types with ratings from 100V to 500V, 1A to 60A, and on resistance as low as 25m. Total dose hardness is offered at 100K RAD(Si) and 1000KRAD(Si) with neutron hardness ranging from 1E13n/cm2 for 500V product to 1E14n/cm2 for 100V product. Dose rate hardness (GAMMA DOT) exists for rates to 1E9 without current limiting and 2E12 with current limiting. This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to exhibit minimal characteristic changes to total dose (GAMMA) and neutron (no) exposures. Design and processing efforts are also directed to enhance survival to heavy ion (SEE) and/or dose rate (GAMMA DOT) exposure. This part may be supplied as a die or in various packages other than shown above. Reliability screening is available as either non TX (commercial), TX equivalent of MIL-S-19500, TXV equivalent of MIL-S-19500, or space equivalent of MIL-S-19500. Contact the Intersil High-Reliability Marketing group for any desired deviations from the data sheet.
Symbol
Absolute Maximum Ratings
(TC = +25oC) Unless Otherwise Specified FRL430D, R, H 500 500 2 1 6 20 25 10 0.20 6 2 6 -55 to +150 300 UNITS V V A A A V W W W/oC A A A oC
oC
Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain-Gate Voltage (RGS = 20k). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = +100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = +100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Derated Above +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Current, Clamped, L = 100H, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . . . . . ILM Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating And Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJC, TSTG Lead Temperature (During Soldering) Distance > 0.063 in. (1.6mm) From Case, 10s Max. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
File Number
3234.1
4-1
FRL430D, FRL430R, FRL430H
Pre-Radiation Electrical Specifications
TC = +25oC, Unless Otherwise Specified LIMITS PARAMETER Drain-Source Breakdown Volts Gate-Threshold Volts Gate-Body Leakage Forward Gate-Body Leakage Reverse Zero-Gate Voltage Drain Current Rated Avalanche Current Drain-Source On-State Volts Drain-Source On Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate-Charge Threshold Gate-Charge On State Gate-Charge Total Plateau Voltage Gate-Charge Source Gate-Charge Drain Diode Forward Voltage Reverse Recovery Time Junction-To-Case Junction-To-Ambient SYMBOL BVDSS VGS(th) IGSSF IGSSR IDSS1 IDSS2 IDSS3 IAR VDS(on) RDS(on) td(on) tr td(off) tf QG(th) QG(on) QGM VGP QGS QGD VSD TT Rjc Rja Free Air Operation ID = 2A, VGD = 0 I = 2A; di/dt = 100A/s VDD = 250V, ID = 2A IGS1 = IGS2 0 VGS 20 TEST CONDITIONS VGS = 0, ID = 1mA VDS = VGS, ID = 1mA VGS = +20V VGS = -20V VDS = 500V, VGS = 0 VDS = 400V, VGS = 0 VDS = 400V, VGS = 0, TC = +125oC Time = 20s VGS = 10V, ID = 2A VGS = 10V, ID = 1A VDD = 250V, ID = 2A Pulse Width = 3s Period = 300s, Rg = 25 0 VGS 10 (See Test Circuit) MIN 500 2.0 1 15 32 3 3 8 0.6 MAX 4.0 100 100 1 0.025 0.25 6 5.25 2.50 46 58 ns 208 54 4 64 130 14 12 nc 32 1.8 1000 5.0 175 V ns
oC/W
UNITS V V nA nA mA A V
nc
V
ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDD L RL VDS VGS = 12V DUT 0V RGS 0V tP + CURRENT I TRANSFORMER AS VDS
-
VARY tP TO OBTAIN REQUIRED PEAK IAS VGS 20V
50
+ VDD
DUT 50 50V-150V
FIGURE 1. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 2. UNCLAMPED ENERGY TEST CIRCUIT
4-2
FRL430D, FRL430R, FRL430H
Post-Radiation Electrical Specifications
TC = +25oC, Unless Otherwise Specified LIMITS PARAMETER Drain-Source Breakdown Volts (Note 4, 6) (Note 5, 6) Gate-Source Threshold Volts (Note 4, 6) (Note 3, 5, 6) Gate-Body Leakage Forward (Note 4, 6) (Note 5, 6) Gate-Body Leakage Reverse (Note 2, 4, 6) (Note 2, 5, 6) Zero-Gate Voltage Drain Current (Note 4, 6) (Note 5, 6) Drain-Source On-State Volts (Note 1, 4, 6) (Note 1, 5, 6) Drain-Source On Resistance (Note 1, 4, 6) (Note 1, 5, 6) NOTES: 1. Pulse test, 300s max 2. Absolute value 3. Gamma = 300KRAD(Si) 4. Gamma = 10KRAD(Si) for "D", 100KRAD(Si) for "R". Neutron = 3E12 5. Gamma = 1000KRAD(Si). Neutron = 3E12 6. Insitu Gamma bias must be sampled for both VGS = +10V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS 7. Gamma data taken 10/29/90 on TA 17635 devices by GE ASTRO SPACE; EMC/SURVIVABILITY LABORATORY; KING OF PRUSSIA, PA 19401 8. Single event drain burnout testing by Titus, J.L., et al of NWSC, Crane, IN at Brookhaven Nat. Lab. Dec 11-14, 1989 9. Neutron derivation, Intersil Application note AN-8831, Oct. 1988 SYMBOL BVDSS BVDSS VGS(th) VGS(th) IGSSF IGSSF IGSSR IGSSR IDSS IDSS VDS(on) VDS(on) RDS(on) RDS(on) TYPE FRL430D, R FRL430H FRL430D, R FRL430H FRL430D, R FRL430H FRL430D, R FRL430H FRL430D, R FRL430H FRL430D, R FRL430H FRL430D, R FRL430H TEST CONDITIONS VGS = 0, ID = 1mA VGS = 0, ID = 1mA VGS = VDS, ID = 1mA VGS = VDS, ID = 1mA VGS = 20V, VDS = 0 VGS = 20V, VDS = 0 VGS = -20V, VDS = 0 VGS = -20V, VDS = 0 VGS = 0, VDS = 400V VGS = 0, VDS = 400V VGS = 10V, ID = 2A VGS = 16V, ID = 2A VGS = 10V, ID = 1A VGS = 14V, ID = 1A MIN 500 475 2.0 1.5 MAX 4.0 4.5 100 200 100 200 25 100 5.25 7.88 2.50 3.75 UNITS V V V V nA nA nA nA A A V V
4-3
FRL430D, FRL430R, FRL430H Typical Performance Characteristics
4-4
FRL430D, FRL430R, FRL430H Rad Hard Data Packages - Intersil Power Transistors
TXV Equivalent 1. Rad Hard TXV Equivalent - Standard Data Package A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet D. Group A E. Group B F. Group C G. Group D - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet E. Preconditioning Attributes Data Sheet Hi-Rel Lot Traveler HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data F. Group A G. Group B H. Group C I. Group D - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet
2. Rad Hard TXV Equivalent - Optional Data Package A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet - Precondition Lot Traveler - Pre and Post Burn-In Read and Record Data D. Group A E. Group B - Attributes Data Sheet - Group A Lot Traveler - Attributes Data Sheet - Group B Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) - Attributes Data Sheet - Group C Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) - Attributes Data Sheet - Group D Lot Traveler - Pre and Post RAD Read and Record Data
2. Rad Hard Max. "S" Equivalent - Optional Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - Hi-Rel Lot Traveler - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups A2, A3, A4, A5 and A7 Data - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups B1, B3, B4, B5 and B6 Data - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups C1, C2, C3 and C6 Data - Attributes Data Sheet - Hi-Rel Lot Traveler - Pre and Post Radiation Data
G. Group B
F. Group C
H. Group C
G. Group D
I. Group D
Class S - Equivalents 1. Rad Hard "S" Equivalent - Standard Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report
4-5
FRL430D, FRL430R, FRL430H TO-205AF
3 LEAD JEDEC TO-205AF HERMETIC METAL CAN PACKAGE
OD OD1 A P
INCHES SYMBOL A Ob MIN 0.160 0.016 0.350 0.315 0.095 0.190 0.095 0.010 0.028 0.029 0.500 0.075 MAX 0.180 0.021 0.370 0.335 0.105 0.210 0.105 0.020 0.034 0.045 0.560 -
MILLIMETERS MIN 4.07 0.41 8.89 8.01 2.42 4.83 2.42 0.26 0.72 0.74 12.70 1.91 MAX 4.57 0.53 9.39 8.50 2.66 5.33 2.66 0.50 0.86 1.14 14.22 NOTES 2, 3 4 4 4 3 5
h
L
SEATING PLANE Ob
OD OD1 e e1
e e1
2 90o 3
e2 h j k L P k
e2
45o
1
j
NOTES: 1. These dimensions are within allowable dimensions of Rev. E of JEDEC TO-205AF outline dated 11-82. 2. Lead dimension (without solder). 3. Solder coating may vary along lead length, add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.100 inches (2.54mm) from bottom of seating plane. 5. This zone controlled for automatic handling. The variation in actual diameter within this zone shall not exceed 0.010 inches (0.254mm). 6. Lead no. 3 butt welded to stem base. 7. Controlling dimension: Inch. 8. Revision 3 dated 6-94.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
4-6


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